A Programmable Logic-Based Implementation of Ultra-Fast Parallel Binary Image Morphological Operations

Binary morphological operations are a building block in many computer vision applications. Several iterative morphological operations are commonly performed for image analysis resulting in a significant computational load on the processing unit, especially in a real-time computer vision system. Custom designed hardware can exploit the natural parallelism exhibited in binary image morphological operations. In this paper we describe a parallel Binary Morphological Unit (pBMU) which can produce two 8-pixel outputs from one of fifteen morphological operations based on a 3x3 mask. Operations include Sobel edge detection, dilation, erosion, Laplacian, and edge thinning. Implementation on an Altera EPM7256SRC208-7 has shown a sustained performance of 1.066 billion output pixels per second at 66.67 MHz. Thus the pBMU can process 1,356 frame-operations on 1024x768 binary images every second. The pBMU architecture and details of implementation are presented.